Valgrind: r16267 - in /branches/VALGRIND_JIT_HACKS/coregrind: m_gdbserver/m_gdbserver.c m_translate.c

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Valgrind: r16267 - in /branches/VALGRIND_JIT_HACKS/coregrind: m_gdbserver/m_gdbserver.c m_translate.c

svn-2
Author: iraisr
Date: Sun Mar 12 08:02:47 2017
New Revision: 16267

Log:
Progress further with m_gdbserver.c and m_translate.c

Modified:
    branches/VALGRIND_JIT_HACKS/coregrind/m_gdbserver/m_gdbserver.c
    branches/VALGRIND_JIT_HACKS/coregrind/m_translate.c

Modified: branches/VALGRIND_JIT_HACKS/coregrind/m_gdbserver/m_gdbserver.c
==============================================================================
--- branches/VALGRIND_JIT_HACKS/coregrind/m_gdbserver/m_gdbserver.c (original)
+++ branches/VALGRIND_JIT_HACKS/coregrind/m_gdbserver/m_gdbserver.c Sun Mar 12 08:02:47 2017
@@ -1144,11 +1144,10 @@
 }
 
 static void VG_(add_stmt_call_invalidate_if_not_gdbserved)
-     ( IRSB* sb_in,
-       const VexGuestLayout* layout,
-       const VexGuestExtents* vge,
-       IRTemp jmp,
-       IRSB* irsb)
+     (const VexGuestLayout* layout,
+      const VexGuestExtents* vge,
+      IRTemp jmp,
+      IRSB* irsb)
 {
   
    void*    fn;
@@ -1167,7 +1166,7 @@
 
    di->nFxState = 0;
 
-   addStmtToIRSB(irsb, IRStmt_Dirty(di));
+   addStmtToIRStmtVec(irsb->stmts, IRStmt_Dirty(di));
 }
 
 /* software_breakpoint support --------------------------------------*/
@@ -1182,13 +1181,12 @@
    of other breaks in the same sb_in while the process is stopped), a
    debugger statement will be inserted for all instructions of a block. */
 static void VG_(add_stmt_call_gdbserver)
-     (IRSB* sb_in,                /* block being translated */
-      const VexGuestLayout* layout,
+     (const VexGuestLayout* layout,
       const VexGuestExtents* vge,
       IRType gWordTy, IRType hWordTy,
-      Addr  iaddr,                /* Addr of instruction being instrumented */
-      UChar delta,                /* delta to add to iaddr to obtain IP */
-      IRSB* irsb)                 /* irsb block to which call is added */
+      Addr       iaddr,          /* Addr of instruction being instrumented */
+      UChar      delta,          /* delta to add to iaddr to obtain IP */
+      IRStmtVec* stmts)          /* list of statements to which call is added */
 {
    void*    fn;
    const HChar*   nm;
@@ -1213,8 +1211,8 @@
       IP when executing thumb code. gdb uses this thumb bit a.o.
       to properly guess the next IP for the 'step' and 'stepi' commands. */
    vg_assert(delta <= 1);
-   addStmtToIRSB(irsb, IRStmt_Put(layout->offset_IP ,
-                                  mkIRExpr_HWord(iaddr + (Addr)delta)));
+   addStmtToIRStmtVec(stmts, IRStmt_Put(layout->offset_IP ,
+                                        mkIRExpr_HWord(iaddr + (Addr)delta)));
 
    fn    = &VG_(helperc_CallDebugger);
    nm    = "VG_(helperc_CallDebugger)";
@@ -1245,8 +1243,7 @@
    di->fxState[1].nRepeats  = 0;
    di->fxState[1].repeatLen = 0;
 
-   addStmtToIRSB(irsb, IRStmt_Dirty(di));
-
+   addStmtToIRStmtVec(stmts, IRStmt_Dirty(di));
 }
 
 
@@ -1269,31 +1266,25 @@
                                        : sb_in->next->Iex.Const.con->Ico.U32);
    } else if (sb_in->next->tag == Iex_RdTmp) {
      VG_(add_stmt_call_invalidate_if_not_gdbserved)
-       (sb_in, layout, vge, sb_in->next->Iex.RdTmp.tmp, irsb);
+       (layout, vge, sb_in->next->Iex.RdTmp.tmp, irsb);
    } else {
      vg_assert (0); /* unexpected expression tag in exit. */
    }
 }
 
-IRSB* VG_(instrument_for_gdbserver_if_needed)
-     (IRSB* sb_in,
-      const VexGuestLayout* layout,
-      const VexGuestExtents* vge,
-      IRType gWordTy, IRType hWordTy)
+static IRStmtVec* instrument_for_gdbserver_IRStmtVec
+                    (IRStmtVec*             stmts_in,
+                     IRStmtVec*             parent,
+                     const VgVgdb           instr_needed,
+                     const VexGuestLayout*  layout,
+                     const VexGuestExtents* vge,
+                     IRType gWordTy, IRType hWordTy)
 {
-   IRSB* sb_out;
-   Int i;
-   const VgVgdb instr_needed = VG_(gdbserver_instrumentation_needed) (vge);
+   IRStmtVec* stmts_out = emptyIRStmtVec();
+   stmts_out->parent    = parent;
 
-   if (instr_needed == Vg_VgdbNo)
-     return sb_in;
-
-
-   /* here, we need to instrument for gdbserver */
-   sb_out = deepCopyIRSBExceptStmts(sb_in);
-
-   for (i = 0; i < sb_in->stmts_used; i++) {
-      IRStmt* st = sb_in->stmts[i];
+   for (UInt i = 0; i < stmts_in->stmts_used; i++) {
+      IRStmt* st = stmts_in->stmts[i];
       
       if (!st || st->tag == Ist_NoOp) continue;
       
@@ -1303,18 +1294,27 @@
            st->Ist.Exit.dst->Ico.U64 :
            st->Ist.Exit.dst->Ico.U32);
       }
-      addStmtToIRSB( sb_out, st );
+
+      if (st->tag == Ist_IfThenElse) {
+         st = IRStmt_IfThenElse(
+                st->Ist.IfThenElse.cond,
+                instrument_for_gdbserver_IRStmtVec(st->Ist.IfThenElse.then_leg,
+                        stmts_out, instr_needed, layout, vge, gWordTy, hWordTy),
+                instrument_for_gdbserver_IRStmtVec(st->Ist.IfThenElse.else_leg,
+                        stmts_out, instr_needed, layout, vge, gWordTy, hWordTy),
+                st->Ist.IfThenElse.phi_nodes);
+      }
+      addStmtToIRStmtVec(stmts_out, st);
+
       if (st->tag == Ist_IMark) {
          /* For an Ist_Mark, add a call to debugger. */
          switch (instr_needed) {
          case Vg_VgdbNo: vg_assert (0);
          case Vg_VgdbYes:
          case Vg_VgdbFull:
-            VG_(add_stmt_call_gdbserver) ( sb_in, layout, vge,
-                                           gWordTy, hWordTy,
-                                           st->Ist.IMark.addr,
-                                           st->Ist.IMark.delta,
-                                           sb_out);
+            VG_(add_stmt_call_gdbserver)(layout, vge, gWordTy, hWordTy,
+                                         st->Ist.IMark.addr, st->Ist.IMark.delta,
+                                         stmts_out);
             /* There is an optimisation possible here for Vg_VgdbFull:
                Put a guard ensuring we only call gdbserver if 'FullCallNeeded'.
                FullCallNeeded would be set to 1 we have just switched on
@@ -1329,11 +1329,28 @@
       }
    }
 
+   return stmts_out;
+}
+
+IRSB* VG_(instrument_for_gdbserver_if_needed)
+     (IRSB* sb_in,
+      const VexGuestLayout* layout,
+      const VexGuestExtents* vge,
+      IRType gWordTy, IRType hWordTy)
+{
+   const VgVgdb instr_needed = VG_(gdbserver_instrumentation_needed) (vge);
+
+   if (instr_needed == Vg_VgdbNo)
+     return sb_in;
+
+   /* here, we need to instrument for gdbserver */
+   IRSB* sb_out = deepCopyIRSBExceptStmts(sb_in);
+   sb_out->stmts = instrument_for_gdbserver_IRStmtVec(sb_in->stmts, NULL,
+                                   instr_needed, layout, vge, gWordTy, hWordTy);
+
    if (instr_needed == Vg_VgdbYes) {
-      VG_(add_stmt_call_invalidate_exit_target_if_not_gdbserved) (sb_in,
-                                                                  layout, vge,
-                                                                  gWordTy,
-                                                                  sb_out);
+      VG_(add_stmt_call_invalidate_exit_target_if_not_gdbserved)(sb_in, layout,
+                                                          vge, gWordTy, sb_out);
    }
 
    return sb_out;

Modified: branches/VALGRIND_JIT_HACKS/coregrind/m_translate.c
==============================================================================
--- branches/VALGRIND_JIT_HACKS/coregrind/m_translate.c (original)
+++ branches/VALGRIND_JIT_HACKS/coregrind/m_translate.c Sun Mar 12 08:02:47 2017
@@ -159,7 +159,7 @@
 {
    Int i;
    for (i = 0; i < N_ALIASES; i++) {
-      SP_aliases[i].temp  = IRTemp_INVALID;
+      SP_aliases[i].temp  = IRTemp_INVALID();
       SP_aliases[i].delta = 0;
    }
    next_SP_alias_slot = 0;
@@ -167,7 +167,7 @@
 
 static void add_SP_alias(IRTemp temp, Long delta)
 {
-   vg_assert(temp != IRTemp_INVALID);
+   vg_assert(!isIRTempInvalid(temp));
    SP_aliases[ next_SP_alias_slot ].temp  = temp;
    SP_aliases[ next_SP_alias_slot ].delta = delta;
    next_SP_alias_slot++;
@@ -177,17 +177,17 @@
 static Bool get_SP_delta(IRTemp temp, Long* delta)
 {
    Int i;      // i must be signed!
-   vg_assert(IRTemp_INVALID != temp);
+   vg_assert(!isIRTempInvalid(temp));
    // Search backwards between current buffer position and the start.
    for (i = next_SP_alias_slot-1; i >= 0; i--) {
-      if (temp == SP_aliases[i].temp) {
+      if (eqIRTemp(temp, SP_aliases[i].temp)) {
          *delta = SP_aliases[i].delta;
          return True;
       }
    }
    // Search backwards between the end and the current buffer position.
    for (i = N_ALIASES-1; i >= next_SP_alias_slot; i--) {
-      if (temp == SP_aliases[i].temp) {
+      if (eqIRTemp(temp, SP_aliases[i].temp)) {
          *delta = SP_aliases[i].delta;
          return True;
       }
@@ -199,7 +199,7 @@
 {
    Int i;
    for (i = 0; i < N_ALIASES; i++) {
-      if (SP_aliases[i].temp == IRTemp_INVALID) {
+      if (isIRTempInvalid(SP_aliases[i].temp)) {
          return;
       }
       SP_aliases[i].delta += delta;
@@ -268,39 +268,36 @@
    only parts of SP.  Bizarre, but it has been known to happen.
 */
 static
-IRSB* vg_SP_update_pass ( void*             closureV,
-                          IRSB*             sb_in,
-                          const VexGuestLayout*   layout,
-                          const VexGuestExtents*  vge,
-                          const VexArchInfo*      vai,
-                          IRType            gWordTy,
-                          IRType            hWordTy )
+IRStmtVec* vg_SP_update_IRStmtVec(void*                  closureV,
+                                  IRStmtVec*             stmts_in,
+                                  IRStmtVec*             parent,
+                                  const VexGuestLayout*  layout,
+                                  const VexGuestExtents* vge,
+                                  const VexArchInfo*     vai,
+                                  IRType                 gWordTy,
+                                  IRType                 hWordTy)
 {
-   Int         i, j, k, minoff_ST, maxoff_ST, sizeof_SP, offset_SP;
+   Int         j, k, minoff_ST, maxoff_ST;
    Int         first_SP, last_SP, first_Put, last_Put;
    IRDirty     *dcall, *d;
-   IRStmt*     st;
    IRExpr*     e;
    IRRegArray* descr;
-   IRType      typeof_SP;
    Long        delta, con;
 
    /* Set up stuff for tracking the guest IP */
    Bool   curr_IP_known = False;
    Addr   curr_IP       = 0;
 
-   /* Set up BB */
-   IRSB* bb     = emptyIRSB();
-   bb->tyenv    = deepCopyIRTypeEnv(sb_in->tyenv);
-   bb->next     = deepCopyIRExpr(sb_in->next);
-   bb->jumpkind = sb_in->jumpkind;
-   bb->offsIP   = sb_in->offsIP;
+   /* Set up new IRStmtVec */
+   IRStmtVec* out = emptyIRStmtVec();
+   out->tyenv     = deepCopyIRTypeEnv(stmts_in->tyenv);
+   out->parent    = parent;
 
    delta = 0;
 
-   sizeof_SP = layout->sizeof_SP;
-   offset_SP = layout->offset_SP;
-   typeof_SP = sizeof_SP==4 ? Ity_I32 : Ity_I64;
+   UInt sizeof_SP   = layout->sizeof_SP;
+   UInt offset_SP   = layout->offset_SP;
+   IRType typeof_SP = sizeof_SP==4 ? Ity_I32 : Ity_I64;
    vg_assert(sizeof_SP == 4 || sizeof_SP == 8);
 
    /* --- Start of #defines --- */
@@ -351,7 +348,7 @@
          dcall->fxState[0].nRepeats  = 0;                               \
          dcall->fxState[0].repeatLen = 0;                               \
                                                                         \
-         addStmtToIRSB( bb, IRStmt_Dirty(dcall) );                      \
+         addStmtToIRStmtVec(out, IRStmt_Dirty(dcall));                  \
                                                                         \
          vg_assert(syze > 0);                                           \
          update_SP_aliases(syze);                                       \
@@ -381,7 +378,7 @@
          dcall->fxState[0].nRepeats  = 0;                               \
          dcall->fxState[0].repeatLen = 0;                               \
                                                                         \
-         addStmtToIRSB( bb, IRStmt_Dirty(dcall) );                      \
+         addStmtToIRStmtVec(out, IRStmt_Dirty(dcall) );                 \
                                                                         \
          vg_assert(syze > 0);                                           \
          update_SP_aliases(-(syze));                                    \
@@ -392,11 +389,11 @@
 
    /* --- End of #defines --- */
 
+   // TODO-JIT: can we move this to vg_SP_update_pass?
    clear_SP_aliases();
 
-   for (i = 0; i <  sb_in->stmts_used; i++) {
-
-      st = sb_in->stmts[i];
+   for (UInt i = 0; i < stmts_in->stmts_used; i++) {
+      IRStmt* st = stmts_in->stmts[i];
 
       if (st->tag == Ist_IMark) {
          curr_IP_known = True;
@@ -409,9 +406,9 @@
       if (e->tag != Iex_Get)              goto case2;
       if (e->Iex.Get.offset != offset_SP) goto case2;
       if (e->Iex.Get.ty != typeof_SP)     goto case2;
-      vg_assert( typeOfIRTemp(bb->tyenv, st->Ist.WrTmp.tmp) == typeof_SP );
+      vg_assert( typeOfIRTemp(out->tyenv, st->Ist.WrTmp.tmp) == typeof_SP );
       add_SP_alias(st->Ist.WrTmp.tmp, 0);
-      addStmtToIRSB( bb, st );
+      addStmtToIRStmtVec(out, st);
       continue;
 
      case2:
@@ -424,13 +421,13 @@
       if (e->Iex.Binop.arg2->tag != Iex_Const) goto case3;
       if (!IS_ADD_OR_SUB(e->Iex.Binop.op)) goto case3;
       con = GET_CONST(e->Iex.Binop.arg2->Iex.Const.con);
-      vg_assert( typeOfIRTemp(bb->tyenv, st->Ist.WrTmp.tmp) == typeof_SP );
+      vg_assert( typeOfIRTemp(out->tyenv, st->Ist.WrTmp.tmp) == typeof_SP );
       if (IS_ADD(e->Iex.Binop.op)) {
          add_SP_alias(st->Ist.WrTmp.tmp, delta + con);
       } else {
          add_SP_alias(st->Ist.WrTmp.tmp, delta - con);
       }
-      addStmtToIRSB( bb, st );
+      addStmtToIRStmtVec(out, st);
       continue;
 
      case3:
@@ -439,9 +436,9 @@
       e = st->Ist.WrTmp.data;
       if (e->tag != Iex_RdTmp) goto case4;
       if (!get_SP_delta(e->Iex.RdTmp.tmp, &delta)) goto case4;
-      vg_assert( typeOfIRTemp(bb->tyenv, st->Ist.WrTmp.tmp) == typeof_SP );
+      vg_assert( typeOfIRTemp(out->tyenv, st->Ist.WrTmp.tmp) == typeof_SP );
       add_SP_alias(st->Ist.WrTmp.tmp, delta);
-      addStmtToIRSB( bb, st );
+      addStmtToIRStmtVec(out, st);
       continue;
 
      case4:
@@ -454,7 +451,7 @@
       last_SP   = first_SP + sizeof_SP - 1;
       first_Put = st->Ist.Put.offset;
       last_Put  = first_Put
-                  + sizeofIRType( typeOfIRExpr( bb->tyenv, st->Ist.Put.data ))
+                  + sizeofIRType(typeOfIRExpr(out->tyenv, st->Ist.Put.data))
                   - 1;
       vg_assert(first_SP <= last_SP);
       vg_assert(first_Put <= last_Put);
@@ -472,31 +469,31 @@
             put_SP_alias is immediately preceded by an assertion that
             we are putting in a binding for a correctly-typed
             temporary. */
-         vg_assert( typeOfIRTemp(bb->tyenv, tttmp) == typeof_SP );
+         vg_assert( typeOfIRTemp(out->tyenv, tttmp) == typeof_SP );
          /* From the same type-and-offset-correctness argument, if
             we found a useable alias, it must for an "exact" write of SP. */
          vg_assert(first_SP == first_Put);
          vg_assert(last_SP == last_Put);
          switch (delta) {
-            case    0:                      addStmtToIRSB(bb,st); continue;
-            case    4: DO_DIE(  4,  tttmp); addStmtToIRSB(bb,st); continue;
-            case   -4: DO_NEW(  4,  tttmp); addStmtToIRSB(bb,st); continue;
-            case    8: DO_DIE(  8,  tttmp); addStmtToIRSB(bb,st); continue;
-            case   -8: DO_NEW(  8,  tttmp); addStmtToIRSB(bb,st); continue;
-            case   12: DO_DIE(  12, tttmp); addStmtToIRSB(bb,st); continue;
-            case  -12: DO_NEW(  12, tttmp); addStmtToIRSB(bb,st); continue;
-            case   16: DO_DIE(  16, tttmp); addStmtToIRSB(bb,st); continue;
-            case  -16: DO_NEW(  16, tttmp); addStmtToIRSB(bb,st); continue;
-            case   32: DO_DIE(  32, tttmp); addStmtToIRSB(bb,st); continue;
-            case  -32: DO_NEW(  32, tttmp); addStmtToIRSB(bb,st); continue;
-            case  112: DO_DIE( 112, tttmp); addStmtToIRSB(bb,st); continue;
-            case -112: DO_NEW( 112, tttmp); addStmtToIRSB(bb,st); continue;
-            case  128: DO_DIE( 128, tttmp); addStmtToIRSB(bb,st); continue;
-            case -128: DO_NEW( 128, tttmp); addStmtToIRSB(bb,st); continue;
-            case  144: DO_DIE( 144, tttmp); addStmtToIRSB(bb,st); continue;
-            case -144: DO_NEW( 144, tttmp); addStmtToIRSB(bb,st); continue;
-            case  160: DO_DIE( 160, tttmp); addStmtToIRSB(bb,st); continue;
-            case -160: DO_NEW( 160, tttmp); addStmtToIRSB(bb,st); continue;
+            case    0:                     addStmtToIRStmtVec(out,st); continue;
+            case    4: DO_DIE( 4,  tttmp); addStmtToIRStmtVec(out,st); continue;
+            case   -4: DO_NEW( 4,  tttmp); addStmtToIRStmtVec(out,st); continue;
+            case    8: DO_DIE( 8,  tttmp); addStmtToIRStmtVec(out,st); continue;
+            case   -8: DO_NEW( 8,  tttmp); addStmtToIRStmtVec(out,st); continue;
+            case   12: DO_DIE( 12, tttmp); addStmtToIRStmtVec(out,st); continue;
+            case  -12: DO_NEW( 12, tttmp); addStmtToIRStmtVec(out,st); continue;
+            case   16: DO_DIE( 16, tttmp); addStmtToIRStmtVec(out,st); continue;
+            case  -16: DO_NEW( 16, tttmp); addStmtToIRStmtVec(out,st); continue;
+            case   32: DO_DIE( 32, tttmp); addStmtToIRStmtVec(out,st); continue;
+            case  -32: DO_NEW( 32, tttmp); addStmtToIRStmtVec(out,st); continue;
+            case  112: DO_DIE(112, tttmp); addStmtToIRStmtVec(out,st); continue;
+            case -112: DO_NEW(112, tttmp); addStmtToIRStmtVec(out,st); continue;
+            case  128: DO_DIE(128, tttmp); addStmtToIRStmtVec(out,st); continue;
+            case -128: DO_NEW(128, tttmp); addStmtToIRStmtVec(out,st); continue;
+            case  144: DO_DIE(144, tttmp); addStmtToIRStmtVec(out,st); continue;
+            case -144: DO_NEW(144, tttmp); addStmtToIRStmtVec(out,st); continue;
+            case  160: DO_DIE(160, tttmp); addStmtToIRStmtVec(out,st); continue;
+            case -160: DO_NEW(160, tttmp); addStmtToIRStmtVec(out,st); continue;
             default:  
                /* common values for ppc64: 144 128 160 112 176 */
                n_SP_updates_generic_known++;
@@ -524,9 +521,9 @@
         generic:
          /* Pass both the old and new SP values to this helper.  Also,
             pass an origin tag, even if it isn't needed. */
-         old_SP = newIRTemp(bb->tyenv, typeof_SP);
-         addStmtToIRSB(
-            bb,
+         old_SP = newIRTemp(out->tyenv, typeof_SP);
+         addStmtToIRStmtVec(
+            out,
             IRStmt_WrTmp( old_SP, IRExpr_Get(offset_SP, typeof_SP) )
          );
 
@@ -552,9 +549,9 @@
                           mkIRExprVec_2( IRExpr_RdTmp(old_SP), st->Ist.Put.data )
                        );
 
-            addStmtToIRSB( bb, IRStmt_Dirty(dcall) );
+            addStmtToIRStmtVec(out, IRStmt_Dirty(dcall));
             /* don't forget the original assignment */
-            addStmtToIRSB( bb, st );
+            addStmtToIRStmtVec(out, st);
          } else {
             /* We have a partial update to SP.  We need to know what
                the new SP will be, and hand that to the helper call,
@@ -569,15 +566,16 @@
             */
             IRTemp new_SP;
             /* 1 */
-            addStmtToIRSB( bb, st );
+            addStmtToIRStmtVec(out, st);
             /* 2 */
-            new_SP = newIRTemp(bb->tyenv, typeof_SP);
-            addStmtToIRSB(
-               bb,
+            new_SP = newIRTemp(out->tyenv, typeof_SP);
+            addStmtToIRStmtVec(
+               out,
                IRStmt_WrTmp( new_SP, IRExpr_Get(offset_SP, typeof_SP) )
             );
             /* 3 */
-            addStmtToIRSB( bb, IRStmt_Put(offset_SP, IRExpr_RdTmp(old_SP) ));
+            addStmtToIRStmtVec(out,
+                               IRStmt_Put(offset_SP, IRExpr_RdTmp(old_SP)));
             /* 4 */
             vg_assert(curr_IP_known);
             if (NULL != VG_(tdict).track_new_mem_stack_w_ECU)
@@ -597,9 +595,10 @@
                           mkIRExprVec_2( IRExpr_RdTmp(old_SP),
                                          IRExpr_RdTmp(new_SP) )
                        );
-            addStmtToIRSB( bb, IRStmt_Dirty(dcall) );
+            addStmtToIRStmtVec(out, IRStmt_Dirty(dcall));
             /* 5 */
-            addStmtToIRSB( bb, IRStmt_Put(offset_SP, IRExpr_RdTmp(new_SP) ));
+            addStmtToIRStmtVec(out,
+                               IRStmt_Put(offset_SP, IRExpr_RdTmp(new_SP)));
          }
 
          /* Forget what we already know. */
@@ -610,7 +609,7 @@
 
          if (first_Put == first_SP && last_Put == last_SP
              && st->Ist.Put.data->tag == Iex_RdTmp) {
-            vg_assert( typeOfIRTemp(bb->tyenv, st->Ist.Put.data->Iex.RdTmp.tmp)
+            vg_assert( typeOfIRTemp(out->tyenv, st->Ist.Put.data->Iex.RdTmp.tmp)
                        == typeof_SP );
             add_SP_alias(st->Ist.Put.data->Iex.RdTmp.tmp, 0);
          }
@@ -646,15 +645,24 @@
          }
       }
 
-      /* well, not interesting.  Just copy and keep going. */
-      addStmtToIRSB( bb, st );
+      if (st->tag == Ist_IfThenElse) {
+         st = IRStmt_IfThenElse(
+                st->Ist.IfThenElse.cond,
+                vg_SP_update_IRStmtVec(closureV, st->Ist.IfThenElse.then_leg,
+                                       out, layout, vge, vai, gWordTy, hWordTy),
+                vg_SP_update_IRStmtVec(closureV, st->Ist.IfThenElse.else_leg,
+                                       out, layout, vge, vai, gWordTy, hWordTy),
+                st->Ist.IfThenElse.phi_nodes);
+      }
 
-   } /* for (i = 0; i < sb_in->stmts_used; i++) */
+      /* well, not interesting.  Just copy and keep going. */
+      addStmtToIRStmtVec(out, st);
+   } /* for (UInt i = 0; i < stmts_in->stmts_used; i++) */
 
-   return bb;
+   return out;
 
   complain:
-   VG_(core_panic)("vg_SP_update_pass: PutI or Dirty which overlaps SP");
+   VG_(core_panic)("vg_SP_update_IRStmtVec: PutI or Dirty which overlaps SP");
 
 #undef IS_ADD
 #undef IS_SUB
@@ -664,6 +672,28 @@
 #undef DO_DIE
 }
 
+/* See vg_SP_update_IRStmtVec() for detailed explanation. */
+static
+IRSB* vg_SP_update_pass ( void*             closureV,
+                          IRSB*             sb_in,
+                          const VexGuestLayout*   layout,
+                          const VexGuestExtents*  vge,
+                          const VexArchInfo*      vai,
+                          IRType            gWordTy,
+                          IRType            hWordTy )
+{
+   /* Set up BB */
+   IRSB* bb     = emptyIRSB();
+   bb->id_seq   = sb_in->id_seq;
+   bb->next     = deepCopyIRExpr(sb_in->next);
+   bb->jumpkind = sb_in->jumpkind;
+   bb->offsIP   = sb_in->offsIP;
+
+   bb->stmts = vg_SP_update_IRStmtVec(closureV, sb_in->stmts, NULL, layout,
+                                      vge, vai, gWordTy, hWordTy);
+   return bb;
+}
+
 /*------------------------------------------------------------*/
 /*--- Main entry point for the JITter.                     ---*/
 /*------------------------------------------------------------*/
@@ -1325,8 +1355,8 @@
       = sizeof(((VexGuestArchState*)0)->guest_NRADDR);
    vg_assert(nraddr_szB == 4 || nraddr_szB == 8);
    vg_assert(nraddr_szB == VG_WORDSIZE);
-   addStmtToIRSB(
-      bb,
+   addStmtToIRStmtVec(
+      bb->stmts,
       IRStmt_Put(
          offsetof(VexGuestArchState,guest_NRADDR),
          nraddr_szB == 8 ? mkU64(0) : mkU32(0)
@@ -1383,8 +1413,8 @@
       = sizeof(((VexGuestArchState*)0)->guest_NRADDR);
    vg_assert(nraddr_szB == 4 || nraddr_szB == 8);
    vg_assert(nraddr_szB == VG_WORDSIZE);
-   addStmtToIRSB(
-      bb,
+   addStmtToIRStmtVec(
+      bb->stmts,
       IRStmt_Put(
          offsetof(VexGuestArchState,guest_NRADDR),
          nraddr_szB == 8


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