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Valgrind: r16390 - /trunk/coregrind/m_machine.c

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Valgrind: r16390 - /trunk/coregrind/m_machine.c

svn-2
Author: petarj
Date: Tue May 16 17:31:16 2017
New Revision: 16390

Log:
mips64: add a workaround for Cavium CPUs to support mips32r1-r2-mips64r1

Linux kernel incorrectly shows that MIPS Cavium CPUs do not support mips32r1,
mips32r2 and mips64r1. This is due to incorrect defines in

arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h

that affect show_cpuinfo() function.

Until that is changed in Linux kernel, we need a workaround in Valgrind, so
all supported ISAs can be executed correctly.

Modified:
    trunk/coregrind/m_machine.c

Modified: trunk/coregrind/m_machine.c
==============================================================================
--- trunk/coregrind/m_machine.c (original)
+++ trunk/coregrind/m_machine.c Tue May 16 17:31:16 2017
@@ -726,6 +726,18 @@
           vai.hwcaps |= VEX_MIPS_CPU_ISA_M64R2;
       if (VG_(strstr) (isa, "mips64r6") != NULL)
           vai.hwcaps |= VEX_MIPS_CPU_ISA_M64R6;
+
+      /*
+       * TODO(petarj): Remove this Cavium workaround once Linux kernel folks
+       * decide to change incorrect settings in
+       * mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h.
+       * The current settings show mips32r1, mips32r2 and mips64r1 as
+       * unsupported ISAs by Cavium MIPS CPUs.
+       */
+      if (VEX_MIPS_COMP_ID(vai.hwcaps) == VEX_PRID_COMP_CAVIUM) {
+         vai.hwcaps |= VEX_MIPS_CPU_ISA_M32R1 | VEX_MIPS_CPU_ISA_M32R2 |
+                       VEX_MIPS_CPU_ISA_M64R1;
+      }
    } else {
       /*
        * Kernel does not provide information about supported ISAs.


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