vex: r3385 - /trunk/priv/guest_x86_toIR.c

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vex: r3385 - /trunk/priv/guest_x86_toIR.c

svn-2
Author: sewardj
Date: Tue May 30 14:17:23 2017
New Revision: 3385

Log:
Handle x86 CET prefixes (32 bit only).  Pertains to #379525.
Patch from [hidden email].

Modified:
    trunk/priv/guest_x86_toIR.c

Modified: trunk/priv/guest_x86_toIR.c
==============================================================================
--- trunk/priv/guest_x86_toIR.c (original)
+++ trunk/priv/guest_x86_toIR.c Tue May 30 14:17:23 2017
@@ -8231,8 +8231,58 @@
             goto decode_success;
          }
       }
-   }      
 
+      // Intel CET requires the following opcodes to be treated as NOPs
+      // with any prefix and ModRM, SIB and disp combination:
+      // "0F 19", "0F 1C", "0F 1D", "0F 1E", "0F 1F"
+      UInt opcode_index = 0;
+      // Skip any prefix combination
+      UInt addr_override = 0;
+      UInt temp_sz = 4;
+      Bool is_prefix = True;
+      while (is_prefix) {
+         switch (code[opcode_index]) {
+            case 0x66:
+               temp_sz = 2;
+               opcode_index++;
+               break;
+            case 0x67:
+               addr_override = 1;
+               opcode_index++;
+               break;
+            case 0x26: case 0x3E: // if we set segment override here,
+            case 0x64: case 0x65: //  disAMode segfaults
+            case 0x2E: case 0x36:
+            case 0xF0: case 0xF2: case 0xF3:
+               opcode_index++;
+               break;
+            default:
+               is_prefix = False;
+         }
+      }
+      // Check the opcode
+      if (code[opcode_index] == 0x0F) {
+         switch (code[opcode_index+1]) {
+            case 0x19:
+            case 0x1C: case 0x1D:
+            case 0x1E: case 0x1F:
+               delta += opcode_index+2;
+               modrm = getUChar(delta);
+               if (epartIsReg(modrm)) {
+                  delta += 1;
+                  DIP("nop%c\n", nameISize(temp_sz));
+               }
+               else {
+                  addr = disAMode(&alen, 0/*"no sorb"*/, delta, dis_buf);
+                  delta += alen - addr_override;
+                  DIP("nop%c %s\n", nameISize(temp_sz), dis_buf);
+               }
+               goto decode_success;
+            default:
+               break;
+         }
+      }
+   }
    /* Normal instruction handling starts here. */
 
    /* Deal with some but not all prefixes:


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Re: vex: r3385 - /trunk/priv/guest_x86_toIR.c

Mineeva, Tatyana A
Julian, one more question,
Which version of valgrind is going to have this patch? 3.14?

Thank you,
Tanya

-----Original Message-----
From: [hidden email] [mailto:[hidden email]]
Sent: Tuesday, May 30, 2017 4:17 PM
To: [hidden email]
Subject: [Valgrind-developers] vex: r3385 - /trunk/priv/guest_x86_toIR.c

Author: sewardj
Date: Tue May 30 14:17:23 2017
New Revision: 3385

Log:
Handle x86 CET prefixes (32 bit only).  Pertains to #379525.
Patch from [hidden email].

Modified:
    trunk/priv/guest_x86_toIR.c

Modified: trunk/priv/guest_x86_toIR.c
==============================================================================
--- trunk/priv/guest_x86_toIR.c (original)
+++ trunk/priv/guest_x86_toIR.c Tue May 30 14:17:23 2017
@@ -8231,8 +8231,58 @@
             goto decode_success;
          }
       }
-   }      
 
+      // Intel CET requires the following opcodes to be treated as NOPs
+      // with any prefix and ModRM, SIB and disp combination:
+      // "0F 19", "0F 1C", "0F 1D", "0F 1E", "0F 1F"
+      UInt opcode_index = 0;
+      // Skip any prefix combination
+      UInt addr_override = 0;
+      UInt temp_sz = 4;
+      Bool is_prefix = True;
+      while (is_prefix) {
+         switch (code[opcode_index]) {
+            case 0x66:
+               temp_sz = 2;
+               opcode_index++;
+               break;
+            case 0x67:
+               addr_override = 1;
+               opcode_index++;
+               break;
+            case 0x26: case 0x3E: // if we set segment override here,
+            case 0x64: case 0x65: //  disAMode segfaults
+            case 0x2E: case 0x36:
+            case 0xF0: case 0xF2: case 0xF3:
+               opcode_index++;
+               break;
+            default:
+               is_prefix = False;
+         }
+      }
+      // Check the opcode
+      if (code[opcode_index] == 0x0F) {
+         switch (code[opcode_index+1]) {
+            case 0x19:
+            case 0x1C: case 0x1D:
+            case 0x1E: case 0x1F:
+               delta += opcode_index+2;
+               modrm = getUChar(delta);
+               if (epartIsReg(modrm)) {
+                  delta += 1;
+                  DIP("nop%c\n", nameISize(temp_sz));
+               }
+               else {
+                  addr = disAMode(&alen, 0/*"no sorb"*/, delta, dis_buf);
+                  delta += alen - addr_override;
+                  DIP("nop%c %s\n", nameISize(temp_sz), dis_buf);
+               }
+               goto decode_success;
+            default:
+               break;
+         }
+      }
+   }
    /* Normal instruction handling starts here. */
 
    /* Deal with some but not all prefixes:


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Re: Spam (7.299):RE: vex: r3385 - /trunk/priv/guest_x86_toIR.c

Julian Seward-2
On 30/05/17 19:22, Mineeva, Tatyana A wrote:
> Julian, one more question,
> Which version of valgrind is going to have this patch? 3.14?

No, the upcoming 3.13.  Once Ivo fixes the test cases, I'll merge this
and the testcase changes to the 3_13 branch, so it will go out in 3.13.

J

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